*denotes equal contribution and joint authorship.
FPGA implementation of CORDIC algorithms for sine and cosine generator
A. P. Renardy*, N. Ahmadi*, A. A. Fadila*, N. Shidqi*, and T. Adiono.
In proceedings of the IEEE International Conference on Electrical Engineering and Informatics (ICEEI), 2015.
Link
A pipelined CORDIC architecture and its implementation in all-digital FM modulator-demodulator
T. Adiono*, N. Ahmadi*, A. P. Renardy*, A. A. Fadila*, and N. Shidqi*.
In proceedings of the IEEE 6th Asia Symposium on Quality Electronic Design (ASQED), 2015.
Link
Hardware implementation of montgomery modular multiplication algorithm using iterative architecture
A. P. Renardy*, N. Ahmadi*, A. A. Fadila*, N. Shidqi*, and T. Adiono.
In proceedings of the IEEE International Seminar on Intelligent Technology and Its Applications (ISITIA), 2015.
Link